In a nonvolatile semiconductor memory device such as a NAND-type flash memory, a select gate transistor is used to select a block for writing or reading. As this select gate transistor is built into a memory cell array in the same manner as a memory cell, its section has a structure similar to that of the memory cell and comprises a charge storage layer such as a floating gate, an intergate insulating film, and a control gate that are stacked.
In order for the select gate transistor to operate as a MOS transistor, it is necessary to open a part of the intergate insulating film in the same manner as the MOS transistor of a peripheral circuit, and electrically connect the control gate to the charge storage layer.
However, if the aspect ratio of the charge storage layer is low, the charge storage layer may be overetched or even a tunnel oxide film under the charge storage layer may be etched in the process of opening (for example, reactive ion etching) the intergate insulating film.